Dr. A. Tye Gardner

Education

Ph.D. at University of Utah
M.S. at University of Utah
B.S. at University of Utah
Curriculum Vitae

Contact Information

Email: averygardner@weber.edu
Phone: 801-626-6895
Office Location: NB 201C
Mail Code 1803
 

Courses Taught

ECE 2700 - Digital Circuits
ECE 3610 - Digital Systems
ECE 6140 - Sensors and Instrumentation

Research Areas of Interest

I am an Electrical Engineer with an emphasis on applied sensor systems with an emphasis on interdisciplinary research. I was an NSF Graduate Research Fellow at the University of Utah, a graduate research assistant at Lawrence Berkeley National Labs and have worked in both software and hardware R&D for companies such as L-3 and local Utah startup Ripple Neuro.

My past work includes radar detection methods for astrophysics, CCD imagining for high-energy particle accelerators, pneumatically controlled experimental test fixtures, bio-realistic signal generation, and precision instrumentation for neural recording and electrochemistry. My most recent works focused on electrochemical characterizations of implanted electrode arrays and the design of electronics to enable these measurements, including low-noise amplifier design and a rapidly multiplexed potentiostat for high-density electrode arrays.

I have continuing interests anywhere new sensors are needed to advance fundamental science. This work includes analog and digital circuit design, as well as exploring how the rapidly advancing field of 3D printing can be applied to bio-interfaces. 


High-density Neural Recording model illustrating comparative system architectures and signal flow within an engineering research framework.

Neural Electrode Characterization displaying characterization curves and performance data from an engineering research experiment.

Rapidly Multiplexed Electrochemistry diagram detailing an implantable biomedical device setup, illustrating miniaturized hardware and wireless signal transfer.

Rapidly Multiplexed Electrochemistry: Research schematic and circuit diagram illustrating custom potentiostat development.

 

A block diagram illustrating a customized hardware signal-processing architecture

A technical diagram illustrating an experimental recording setup, hardware connections, and data acquisition workflow